FIG. 1 shows the working waves of the traditional start-up mode of a start-up circuit. At the start time instant of the time span T1, the system is powered on and the start-up begins, then the VDD voltage continuously rises. At the end time instant of the time span T1, the VDD voltage reaches the threshold value VTH1, and the chip starts to work normally. The time span T2 is a normal working stage. When an abnormal event occurs at a certain time instant during the time span T2, the VDD voltage falls. When the VDD voltage falls to the threshold value VTH2, the under voltage latching signal UVLO is activated, and the chip goes into a restart stage of the time span T3. The VDD voltage rises and reaches the threshold value VTH1 again at the end time instant of the time span T3, and the chip starts to work normally and re-detects for any abnormal event. If the abnormal event still exists or any other abnormal event occurs, the restart process described above will be repeated until the time instant when the abnormal event is eliminated. After the successive restart process is over, the chip goes into the normal working stage of the time span T5.
The traditional start-up mode can ensure that the chip starts up normally and restarts when an abnormal event occurs, but in the traditional start-up mode, the power-on start-up time of the chip and the restart time of the chip are fixed and un-adjustable. What's more, the power-on start-up speed of the chip is identical to the restart speed of the chip. For example, when the power-on start-up is faster, the restart time will be shorter, thus resulting in larger input power during the restart and more power consumption. If the restart speed is lowered in order to decrease the power consumption during the restart, the power-on start-up speed will also be lowered, and may come to such a level that does not meet the application requirements.